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VLSI Design Short Course

Introduction

The VLSI Design Short Course is designed to provide students with a comprehensive understanding of the basic principles of digital electronic circuits. With the exponential growth of electronics in various aspects of life, it is essential for engineers to comprehend the design of CMOS-based digital systems.

Course Description

The goal of this course is to give students a good understanding of how CMOS-based digital systems are designed, with an emphasis on circuit design aspects. The course covers the main steps involved in the fabrication of CMOS VLSI systems, the structure and operation of MOS transistors, and the impact of small geometry and variation on device performance.

Learning Outcomes

Attendees will understand the following topics:

• Main steps involved in the fabrication of CMOS VLSI systems
• Structure and operation of MOS transistors
• Impact of small geometry and variation on device performance
• Design and evaluation of combinational and sequential logic circuits
• Digital circuit design and tradeoffs for power, performance, and area
• Analysis of digital memory circuits, periphery logic, and memory hierarchy
• Testing of VLSI digital circuits and its impact on quality and cost
• Emerging Electronics Technology and its role in the next computing paradigm

Target Audience

The course is designed for students, researchers, and industry personnel who want to learn about the hardware that runs all devices, focusing on digital circuit design (VLSI). A background in basic circuit design and analysis, digital logic, and computer architecture is helpful.

Course Outline

The course covers the following topics:

• CMOS Technology and Basic Device Structure
  • Introduction to CMOS technology
• Combinational Circuits (Transistor Level Design)
  • Static CMOS Gates (NAND, NOR, Complex Gates AOI)
  • Transmission and Tri-state Gate
  • Combinational Block (Multiplexer, Decoder, Adder, and Comparator)
• Sequential Circuits
  • Static Latch
  • Flip-Flop
  • Pulse-Latch
• Timing Analysis
  • Maximum Frequency
  • Clock Skew and Clock Jitter
• Power Analysis
  • Static Power
  • Active Power
• Power, Performance, Area (PPA) Tradeoffs
• CMOS Memory
  • SRAM, DRAM, Flash Basic Principle and Cell Design
  • Memory Organization, Periphery Circuit, Memory Hierarchy (L1, L2 Caches)
• VLSI Testing
  • Stuck at Fault
  • Built-In Self-Test (BIST)
• Emerging Technology: Beyond CMOS (RRAM, In-memory Computing)
• CMOS Layout
  • Stick Diagram
  • Layout Generation and Analysis

Course Details

• The course is 5 days long, with three full days for theoretical discussion and two full days for practical hands-on training.
• Course Fee (VAT Exclusive): AED 2524